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14 Ağustos 2010 Cumartesi

Rubik's Cube



The Rubik's Cube is a 3-D mechanical puzzle invented in 1974 by Hungarian sculptor and professor of architecture Ernő Rubik. Originally called the "Magic Cube", the puzzle was licensed by Rubik to be sold by Ideal Toys in 1980 and won the German Game of the Year special award for Best Puzzle that year. As of January 2009, 350 million cubes have sold worldwide making it the world's top-selling puzzle game. It is widely considered to be the world's best-selling toy.

In a classic Rubik's Cube, each of the six faces is covered by nine stickers, among six solid colours (traditionally white, red, blue, orange, green, and yellow). A pivot mechanism enables each face to turn independently, thus mixing up the colours. For the puzzle to be solved, each face must be a solid colour. Similar puzzles have now been produced with various numbers of stickers, not all of them by Rubik. The original 3×3×3 version celebrates its thirtieth anniversary in 2010.

There are many algorithms to solve scrambled Rubik's Cubes. The minimum number of face turns needed to solve any instance of the Rubik's cube is 20. This number is also known as the diameter of the Cayley graph of the Rubik's Cube group. An algorithm that solves a cube in the minimum number of moves is known as God's algorithm.

There are two common ways to measure the length of a solution. The first is to count the number of quarter turns. The second is to count the number of face turns. A move like F2 (a half turn of the front face) would be counted as 2 moves in the quarter turn metric and as only 1 turn in the face metric.

In 2006, Silviu Radu further improved his methods to prove that every position can be solved in at most 27 face turns or 35 quarter turns. Daniel Kunkle and Gene Cooperman in 2007 used a supercomputer to show that all unsolved cubes can be solved in no more than 26 moves (in face-turn metric). Instead of attempting to solve each of the billions of variations explicitly, the computer was programmed to bring the cube to one of 15,000 states, each of which could be solved within a few extra moves. All were proved solvable in 29 moves, with most solvable in 26. Those that could not initially be solved in 26 moves were then solved explicitly, and shown that they too could be solved in 26 moves.

Tomas Rokicki reported in 2008 computational proof that all unsolved cubes could be solved in 25 moves or fewer. This was later reduced to 23 moves. In August 2008 Rokicki announced that he had a proof for 22 moves. In 2009, Tomas Rokicki proved that 29 moves in quarter turn metric is enough to solve any scrambled cube. Finally, in 2010, an international Group around Morley Davidson gave the final proof that all cube positions could be solved with a maximum of 20 face turns.

11 Temmuz 2010 Pazar

NonStop


Tandem NonStopII System (1981)

NonStop can refer to the line of HP Integrity NonStop computers, the line of Tandem NonStop computers that preceded them, or the NonStop OS operating system that is designed for them. NonStop systems are based on an integrated hardware/software stack. They are self-healing systems designed with redundant components and automatic reconfiguration in the event of a component failure, to prevent against "single-point failures". The systems run the NonStop OS operating system and the database management systems NonStop SQL and Enscribe.

Originally introduced in 1976 by Tandem Computers Inc., the line was later owned by Compaq (from 1997) and Hewlett-Packard (since 2003). In 2005, the current product line of HP Integrity NonStop servers, based on Intel Itanium microprocessors, was introduced.

Early NonStop applications had to be specially coded to be fault-tolerant. That obstacle was removed in 1983 with the introduction of the Transaction Monitoring Facility (TMF), which handles the various aspects of fault tolerance on the system level, transparent to the application.

NonStop OS

NonStop OS is a message-based operating system designed for software fault tolerance. It works with process pairs and ensures that backup processes in different CPU's take over in case of a process or CPU failure. Data integrity is maintained during those takeovers, no transactions or data are lost or corrupted.

NonStop Hardware

The HP Integrity NonStop computers are a line of fault-tolerant server computers, optimized for transaction processing and providing an extreme level of availability and data integrity. Average availability levels of 99.999% have been observed. NonStop systems feature a massive parallel processing (MPP) architecture and provide linear scalability. Each CPU (systems can be expanded up to over 4000 CPUs) runs its own copy of the OS. This is a "share nothing" arrangement and no "diminishing returns" occur as more processors are added.

Due to the integrated hardware/software stack and a single system image for even the largest configurations, system management requirements for NonStop systems are rather low. In most deployments there is just a single production server, not a complex server farm.

Most customers also have a backup server in a remote location for disaster recovery. There are standard products to keep the data of the production and the backup server in sync, hence there is fast takeover and no data loss also in a disaster situation with the production server being disabled or destroyed.

NonStop systems are inherently very secure, no security breach by outside hackers has been reported so far.

HP also developed a data warehouse and business intelligence server line, HP Neoview, based on the NonStop line. It acts as a database server, providing NonStop OS and NonStop SQL, but lacks the transaction processing functionality of the original NonStop systems.

2 Temmuz 2010 Cuma

Connection Machine



The Connection Machine was a series of supercomputers that grew out of Danny Hillis's research in the early 1980s at MIT on alternatives to the traditional von Neumann architecture of computation. The Connection Machine was originally intended for applications in artificial intelligence and symbolic processing, but later versions found greater success in the field of computational science.

Danny Hillis and Sheryl Handler founded Thinking Machines in Waltham, Massachusetts (it was later moved to Cambridge, Massachusetts) in 1983 and assembled a team to develop the CM-1 Connection Machine. This was a "massively parallel" hypercubic arrangement of thousands of microprocessors, each with its own 4 kbits of RAM, which together executed in a SIMD fashion. The CM-1, depending on the configuration, had as many as 65,536 processors. The individual processors were extremely simple, processing one bit at a time.

The CM-1 and CM-2 took the form of a cube 1.5 meters on a side, divided equally into eight smaller cubes. Each sub-cube contained 16 printed circuit boards and a main processor called a sequencer. Each printed circuit board contained 32 chips. Each chip contained a communication channel called a router, 16 processors, 16 RAMs. The CM-1 as a whole had a hypercubic routing network, a main RAM, and an input/output processor. It was connected to a switching device called a nexus.

In order to improve its commercial viability, the CM-2, launched in 1987, added Weitek 3132 floating-point numeric co-processors and more RAM to the system. 32 of the original one-bit processors shared each numeric processor. The CM-2 could be configured with up to 512 MB of RAM, and a RAID hard disk array, called a DataVault, of up to 25 GB.

Two later variants of the CM-2 were also produced, the smaller CM-2a with either 4096 or 8192 single-bit processors, and the faster CM-200.
The light panels of FROSTBURG, a CM-5, on display at the National Cryptologic Museum. The panels were used to check the usage of the processing nodes, and to run diagnostics.

Due to its origins in AI research, the software for the CM-1/2/200 single-bit processor was influenced by the Lisp programming language and a version of Common Lisp, *Lisp (spoken: "Star-Lisp"), was implemented on the CM-1. Other early languages included Karl Sims' IK and Cliff Lasser's URDU. Much system utility software for the CM-1/2 was written in *Lisp.

With the CM-5, announced in 1991, Thinking Machines switched from the CM-2's hypercubic architecture of simple processors to an entirely new MIMD architecture based on a fat tree network of SPARC RISC processors. The later CM-5E replaced the SPARC processors with faster SuperSPARCs.

24 Şubat 2008 Pazar

8b/10b

8b/10b



Original paper by Franaszek and Widmer

In telecommunications, 8b/10b is a line code that maps 8-bit symbols to 10-bit symbols to achieve DC-balance and bounded disparity, and yet provide enough state changes to allow reasonable clock recovery. This means that the difference between the count of 1s and 0s in a string of at least 20 bits is no more than 2, and that there are not more than five 1s or 0s in a row. This helps to reduce the demand for the lower bandwidth limit of the channel necessary to transfer the signal.

The code was described in 1983 by Al Widmer and Peter Franaszek in the IBM Journal of Research and Development. IBM was issued a patent for the scheme the following year. IBM's patent notwithstanding, the method, implementation and goals are very similar to Group Code Recording (GCR) used on floppy disks in some computers during late 1970s/early 80s.

Technologies that use 8b/10b

Now that the IBM patent has expired, the scheme has become even more popular and is the default DC-free line code for new standards.

Among the areas in which 8B/10B encoding finds application are

* PCI Express
* IEEE 1394b
* Serial ATA
* SAS
* Fibre Channel
* SSA
* Gigabit Ethernet (except for the twisted pair based 1000Base-T)
* InfiniBand
* XAUI
* Serial RapidIO
* DVI and HDMI (Transition Minimized Differential Signaling)
* DVB Asynchronous Serial Interface (ASI)
* HyperTransport

27 Ocak 2008 Pazar

Amstrad CPC



amstrad.com

Amstrad CPC 464


The Amstrad CPC was a series of 8-bit home computers produced by Amstrad during the 1980s and early 1990s. CPC stood for 'Colour Personal Computer', although it was possible to purchase a CPC with a green screen (GT65/66) as well as with the standard colour screen (CTM640).


The Schneider CPC664

The first machine, the CPC 464 was introduced in 1984. It was designed to be a direct competitor to the Commodore 64 and Sinclair ZX Spectrum systems. The CPC range was very successful, and over 3 million were sold during the machine's lifespan.

Outwardly, the most distinguishing features of Amstrad's offering were the matt black console case with sharp corners and narrowly rectangular form factor (the latter due to the built-in cassette tape deck (CPC 464) or floppy disk drive (CPC 664 and CPC 6128), the keyboard's distinctly coloured special keys (all the non-typewriter-standard keys on the 464 and 664), and the unique power supply hookup with one lead going from the monitor to the computer (or RF modulator) and, on disc-based machines, one lead going the other way. A television could be used with an optional adapter, and an optional tuner was available to turn the monitor into a TV.

The CPC family

The original CPC was sold in the following configurations:

* CPC 464 – Tape deck, 64 KB RAM, square-edged keyboard
* CPC 472 – Tape deck, 72 KB RAM (although the extra 8 KB of RAM could not be used because the chip was not connected, only soldered to a dummy PCB); produced in small numbers for the Spanish market to avoid a legal ruling requiring that all computers with 64 KB or less RAM must be localized to the Spanish language, including the keyboard and screen messages. The law was subsequently changed to include machines with more than 64 KB RAM so a localised version of the 472 also exists.
* CPC 664 – 3" Floppy disk drive, 64 KB RAM, bowed keyboard; short-lived model, quickly replaced by the better-specified 6128
* CPC 6128 – 3" Floppy disk drive, 128 KB RAM (accessed using bank switching), more PC-like keyboard

An external disk drive (DDI-1) was available for the 464, incorporating the DOS in an interface unit. A second drive (FD-1) could be added to both this and 664/6128 machines. Cassette recorders could also be connected to the 664 and 6128. By and large, the later versions were compatible with earlier machines, though there were some incompatibilities in undocumented features. Third-party hardware add-ons such as Romantic Robot's popular Multiface allowed DIY backup of most tape software to disk.

Most games, especially in the early years, targeted the 64 KB RAM 464 and 664 models. However, an increasing number of applications and demos made use of the extra memory of the 6128 as time went on, to the extent that much CPC software from the 1990s will not run on an unexpanded 464/664. RAM expansions were available, the most popular being produced by dk'Tronics.

The memory layout of the system allowed the CPCs to run CP/M 2.2 and CP/M software adapted especially for the machines' terminal emulation was not uncommon. An Amstrad-specific variant of CP/M 3.1 (aka CP/M Plus) was shipped with the 6128.

23 Aralık 2007 Pazar

Intel 80286



Intel 80286 cpu-info.com

The Intel's 286, introduced on February 1, 1982, (originally named 80286, and also called iAPX 286 in the programmer's manual) was an x86 16-bit microprocessor with 134,000 transistors.

It was widely used in IBM PC compatible computers during the mid 1980s to early 1990s.

After the 6 and 8 MHz initial releases, it was subsequently scaled up to 12.5 MHz. (AMD and Harris later pushed the architecture to speeds as high as 20 MHz and 25 MHz, respectively.) On average, the 80286 had a speed of about 0.21 instructions per clock. [2] The 6 MHz model operated at 0.9 MIPS, the 10 MHz model at 1.5 MIPS, and the 12 MHz model at 2.66 MIPs.

The 80286's performance was more than twice that of its predecessors (the Intel 8086 and Intel 8088) per clock cycle. In fact, the performance increase per clock cycle may be the largest among the generations of x86 processors. Calculation of the more complex addressing modes (such as base+index) had less clock penalty because it was performed by a special circuit in the 286; the 8086, its predecessor, had to perform effective address calculation in the general ALU, taking many cycles. Also, complex mathematical operations (such as MUL/DIV) took fewer clock cycles compared to the 8086.



Having a 24-bit address bus, The 286 was able to address up to 16 MB of RAM, in contrast to 1 MB that the 8086 could directly work with. While DOS could utilize this additional RAM (extended memory) via BIOS call (INT 15h, AH=87h), or as RAM disk, or emulation of expanded memory, cost and initial rarity of software utilizing extended memory meant that 286 computers were rarely equipped with more than a megabyte of RAM.

The 286 was designed to run multitasking applications, including communications (such as automated PBXs), real-time process control, and multi-user systems.

Designer: Intel
Manufacturers: Intel, AMD, Harris, SAB
Introduction date: February 1982
Introduction speed: 6 MHz
Maximum speed: 25 MHz
Cache: -
Transistor count: 134,000
Manufacturing process: 1.5 micron

Amiga 500



Amiga 500 Specs and Photos

The Amiga 500, also known as the A500, was the first “low-end” Commodore Amiga 16/32-bit multimedia home/personal computer. It was announced at the winter Consumer Electronics Show in January 1987, at the same time as the high-end Amiga 2000, and competed directly against the Atari 520ST. The A500 was released in mid 1987 at the price of US $595.95 without monitor. However, the term high-end and low-end did not truly factor in, until the advent of the A3000, and the AGA systems.

The original A500 proved to be Commodore’s best-selling Amiga model, enjoying particular success in Europe. Although popular with hobbyists, arguably its most widespread use was as a gaming machine, where its advanced graphics and sound were of significant benefit.

Case Type: Computer in a keyboard
Processor: 68000@7.14Mhz
MMU: None
FPU: None
Chipset: OCS (more common) or ECS
Standard CHIP RAM: 512K
RAM sockets: None
Hard Drive Controllers: None
Drive Bays: 1 x Custom Floppy Drive Bay

Reyes Rendering



Reyes Rendering Wikipedia

Reyes rendering is a computer software architecture used in 3D computer graphics to render photo-realistic images. It was developed in the mid-1980s by Lucasfilm's Computer Graphics Research Group, which is now Pixar. It was first used in 1982 to render images for the Genesis effect sequence in the movie Star Trek II: The Wrath Of Khan. Pixar's PhotoRealistic RenderMan is one implementation of the Reyes algorithm. According to the original paper describing the algorithm the Reyes image rendering system is "An architecture ... for fast high-quality rendering of complex images." Reyes was proposed as a collection of algorithms and data processing systems. However the terms "algorithm" and "architecture" have come to be used synonymously and are used interchangeably in this article.

Reyes is an acronym for Renders Everything You Ever Saw (the name is also a pun on Point Reyes, California, near where Lucasfilm was located) and is suggestive of processes connected with optical imaging systems.

Reyes Renderers

The following renderers use the Reyes algorithm in one way or the other or at least allow users to select it to produce their images:

* Digits 'n Art's 3Delight
* Aqsis
* jrMan
* Pixar's RenderMan Pro Server & RenderMan for Maya
* Pixels 3d Renderer
* Pixie
* DotC Software's RenderDotC
* SideFX's VMantra
* e frontier Poser's FireFly


Macintosh XL



Macintosh XL Specifications

The Macintosh XL was a modified version of the Apple Lisa personal computer made by Apple Computer. In the Macintosh XL configuration, the computer shipped with MacWorks XL, a Lisa program that allowed 64K Macintosh ROM emulation. An identical machine was sold as the Lisa 2/10 with the Lisa OS only.

The Macintosh XL had a 400K 3.5" floppy drive and an internal 10 MB proprietary Widget hard drive with provision for an optional 5 or 10MB external ProFile hard drive. At the time of release, the Macintosh XL was colloquially referred to as the "Hackintosh", although this name has also been used more generally to describe Macintosh computers assembled from unusual combinations of parts.

Processor: 68000, 5
PMMU:none
FPU: none
Data Path:16, 5
L1 Cache: none
L2 Cache: none
2nd Processor: none
Slots: 3 Lisa slots

Logic Board: none
RAM Slots: 2, Lisa cards
Min - Max RAM: 0.5 MB - 2 MB
RAM Sizes: 512 K
Install in Groups of: 1